xiiregexbuilder

FPGA-Accelerated Regular Expression Matching Engine
commit f87bd32015d5f293ce41b5f63d0de69b6805414b
parent f402b6ca0c8cb2ab86e3152f91e1e9e67cf7fc48
Author: Vishrut Gurrala <maydayv7@gmail.com>
Date:   Thu,  9 Apr 2026 22:00:00 +0530

Week 4: Python Interactive TUI, FPGA Program Scripts, and final verification traces (Part 1: Initial definitions)

Diffstat:
Mdump.vcd | 418+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 418 insertions(+), 0 deletions(-)

diff --git a/dump.vcd b/dump.vcd @@ -1637,3 +1637,421 @@ b100 9 b10 ; b0 < b10 > + +#910000 +0! +b1100010 & +0( +b1100010 - +b100 3 +b100 6 +b100 < +b100 ? + +#915000 +1! +1( +b0 / +b100 2 +b100 5 +b100 8 +b1000 9 +b100 ; +b0 < +b100 > + +#920000 +0! +b1100011 & +0( +b1100011 - +b1000 3 +b1000 6 +b0 9 +b1000 < +b1000 ? + +#925000 +1! +1( +b1000 2 +b0 3 +b1000 5 +b0 6 +b0 8 +b1000 ; +b0 < +b1000 > +b0 ? + +#930000 +0! +1% +0( +1, + +#935000 +1! +b10110 ' +1( +11 +b0 2 +14 +b0 5 +1: +b0 ; +b0 > + +#940000 +0! +0% +0( +0, + +#945000 +1! +b0 ' +1( +01 +04 +0: + +#950000 +0! +1$ +0( +1+ + +#955000 +1! +1( +b1 / +b1 2 +b1 5 +b1 8 +b1 ; +b1 > +b1000 ? + +#960000 +0! +0$ +b1100001 & +0( +0+ +b1100001 - +b10 0 +b10 3 +b10 6 +b10 9 +b10 < +b10 ? + +#965000 +1! +1( +b10 / +b0 0 +b10 2 +b0 3 +b10 5 +b10 8 +b100 9 +b10 ; +b0 < +b10 > + +#970000 +0! +b1100010 & +0( +b1100010 - +b100 3 +b100 6 +b100 < +b100 ? + +#975000 +1! +1( +b0 / +b100 2 +b100 5 +b100 8 +b1000 9 +b100 ; +b0 < +b100 > + +#980000 +0! +b1100011 & +0( +b1100011 - +b1000 3 +b1000 6 +b0 9 +b1000 < +b1000 ? + +#985000 +1! +1( +b1000 2 +b0 3 +b1000 5 +b0 6 +b0 8 +b1000 ; +b0 < +b1000 > +b0 ? + +#990000 +0! +b1100100 & +0( +b1100100 - +b10000 ? + +#995000 +1! +1( +b0 2 +b0 5 +b0 ; +b10000 > + +#1000000 +0! +1% +0( +1, + +#1005000 +1! +b100000 ' +1( +1= + +#1010000 +0! +0% +0( +0, + +#1015000 +1! +b0 ' +1( +0= + +#1020000 +0! +1$ +0( +1+ + +#1025000 +1! +1( +b1 / +b1 2 +b1 5 +b1 8 +b1 ; +b1 > +b0 ? + +#1030000 +0! +0$ +b1100001 & +0( +0+ +b1100001 - +b10 0 +b10 3 +b10 6 +b10 9 +b10 < +b10 ? + +#1035000 +1! +1( +b10 / +b0 0 +b10 2 +b0 3 +b10 5 +b10 8 +b100 9 +b10 ; +b0 < +b10 > + +#1040000 +0! +b1100010 & +0( +b1100010 - +b100 3 +b100 6 +b100 < +b100 ? + +#1045000 +1! +1( +b0 / +b100 2 +b100 5 +b100 8 +b1000 9 +b100 ; +b0 < +b100 > + +#1050000 +0! +b1100011 & +0( +b1100011 - +b1000 3 +b1000 6 +b0 9 +b1000 < +b1000 ? + +#1055000 +1! +1( +b1000 2 +b0 3 +b1000 5 +b0 6 +b0 8 +b1000 ; +b0 < +b1000 > +b0 ? + +#1060000 +0! +b1100101 & +0( +b1100101 - +b100000 ? + +#1065000 +1! +1( +b0 2 +b0 5 +b0 ; +b100000 > + +#1070000 +0! +1% +0( +1, + +#1075000 +1! +b100000 ' +1( +1= + +#1080000 +0! +0% +0( +0, + +#1085000 +1! +b0 ' +1( +0= + +#1090000 +0! +0( + +#1095000 +1! +1( + +#1100000 +0! +0( + +#1105000 +1! +1( + +#1110000 +0! +0( + +#1115000 +1! +1( + +#1120000 +0! +0( + +#1125000 +1! +1( + +#1130000 +0! +0( + +#1135000 +1! +1( + +#1140000 +0! +0( + +#1145000 +1! +1( + +#1150000 +0! +0( + +#1155000 +1! +1( + +#1160000 +0! +0( + +#1165000 +1! +1( + +#1170000 +0! +0( + +#1175000 +1! +1( + +#1180000 +0! +0( + +#1185000 +1! +1(