xiiregexbuilder

  1`timescale 1ns / 1ps
  2
  3module tb_regex_cpu;
  4
  5  reg         clk;
  6  reg         rst;
  7  reg         start;
  8  reg         end_of_str;
  9  reg  [ 7:0] char_in;
 10  reg         char_valid;
 11
 12  reg         prog_en;
 13  reg  [ 7:0] prog_addr;
 14  reg  [31:0] prog_data;
 15
 16  wire        ready;
 17  wire [15:0] match_bus;
 18
 19  regex_cpu #(
 20      .NUM_REGEX(16)
 21  ) uut (
 22      .clk(clk),
 23      .rst(rst),
 24      .start(start),
 25      .end_of_str(end_of_str),
 26      .char_in(char_in),
 27      .char_valid(char_valid),
 28      .prog_en(prog_en),
 29      .prog_addr(prog_addr),
 30      .prog_data(prog_data),
 31      .ready(ready),
 32      .match_bus(match_bus)
 33  );
 34
 35  always #5 clk = ~clk;
 36
 37  task send_char;
 38    input [7:0] c;
 39    begin
 40      wait (ready);
 41      @(posedge clk);
 42      char_in = c;
 43      char_valid = 1;
 44      @(posedge clk);
 45      char_valid = 0;
 46      @(posedge clk);
 47      wait (ready);
 48    end
 49  endtask
 50
 51  task finish_string;
 52    begin
 53      wait (ready);
 54      @(posedge clk);
 55      end_of_str = 1;
 56      @(posedge clk);
 57      end_of_str = 0;
 58      @(posedge clk);
 59      wait (ready);
 60    end
 61  endtask
 62
 63  task test_string;
 64    input [127:0] s;
 65    input integer len;
 66    integer i;
 67    reg [7:0] c;
 68    begin
 69      @(posedge clk);
 70      start = 1;
 71      @(posedge clk);
 72      start = 0;
 73      @(posedge clk);
 74      wait (ready);
 75
 76      for (i = 0; i < len; i = i + 1) begin
 77        c = s[(len-1-i)*8+:8];
 78        send_char(c);
 79      end
 80      finish_string();
 81      $display("Test Done. MatchBus: %b", match_bus);
 82      #20;
 83    end
 84  endtask
 85
 86  initial begin
 87    $dumpfile("processor/build/dump_processor.vcd");
 88    $dumpvars(0, tb_regex_cpu);
 89
 90    clk = 0;
 91    rst = 1;
 92    start = 0;
 93    end_of_str = 0;
 94    char_in = 0;
 95    char_valid = 0;
 96    prog_en = 0;
 97    prog_addr = 0;
 98    prog_data = 0;
 99    #20 rst = 0;
100
101    $display("--- Starting Robust Simulation ---");
102
103    $display("1. Testing 'abbc' (Regex 0)...");
104    test_string("abbc", 4);
105
106    $display("2. Testing 'abb' (Regex 1)...");
107    test_string("abb", 3);
108
109    $display("3. Testing 'ac' (Regex 2)...");
110    test_string("ac", 2);
111
112    $display("4. Testing 'ccc' (Regex 4)...");
113    test_string("ccc", 3);
114
115    $display("5. Testing 'abc' (Regex 7)...");
116    test_string("abc", 3);
117
118    $display("6. Testing 'babc' (Regex 9)...");
119    test_string("babc", 4);
120
121    $display("7. Testing 'acac' (Regex 10)...");
122    test_string("acac", 4);
123
124    $display("8. Testing 'cccb' (Regex 11)...");
125    test_string("cccb", 4);
126
127    #50 $finish;
128  end
129
130endmodule