xiiregexbuilder

 1## Clock signal (Nexys A7 100MHz)
 2set_property PACKAGE_PIN E3 [get_ports clk]
 3set_property IOSTANDARD LVCMOS33 [get_ports clk]
 4create_clock -add -name sys_clk_pin -period 10.00 -waveform {0 5} [get_ports clk]
 5
 6## USB-RS232 Interface (Nexys A7)
 7set_property PACKAGE_PIN C4 [get_ports uart_rx_pin]
 8set_property IOSTANDARD LVCMOS33 [get_ports uart_rx_pin]
 9
10set_property PACKAGE_PIN D4 [get_ports uart_tx_pin]
11set_property IOSTANDARD LVCMOS33 [get_ports uart_tx_pin]
12
13## Buttons (Nexys A7 Center Button - BTNC)
14set_property PACKAGE_PIN N17 [get_ports rst_btn]
15set_property IOSTANDARD LVCMOS33 [get_ports rst_btn]
16
17## LEDs (Nexys A7 LED0 to LED15)
18set_property PACKAGE_PIN H17 [get_ports {match_leds[0]}]
19set_property IOSTANDARD LVCMOS33 [get_ports {match_leds[0]}]
20set_property PACKAGE_PIN K15 [get_ports {match_leds[1]}]
21set_property IOSTANDARD LVCMOS33 [get_ports {match_leds[1]}]
22set_property PACKAGE_PIN J13 [get_ports {match_leds[2]}]
23set_property IOSTANDARD LVCMOS33 [get_ports {match_leds[2]}]
24set_property PACKAGE_PIN N14 [get_ports {match_leds[3]}]
25set_property IOSTANDARD LVCMOS33 [get_ports {match_leds[3]}]
26set_property PACKAGE_PIN R18 [get_ports {match_leds[4]}]
27set_property IOSTANDARD LVCMOS33 [get_ports {match_leds[4]}]
28set_property PACKAGE_PIN V17 [get_ports {match_leds[5]}]
29set_property IOSTANDARD LVCMOS33 [get_ports {match_leds[5]}]
30set_property PACKAGE_PIN U17 [get_ports {match_leds[6]}]
31set_property IOSTANDARD LVCMOS33 [get_ports {match_leds[6]}]